What is a K-Map solver used for in Digital Logic Design (DLD)?

A K-Map (Karnaugh Map) solver groups the 1s and 0s of a Boolean expression or truth table into a color-coded map to find the minimal Sum-of-Products or Product-of-Sums form. Mantiq solves K-Maps for 2 to 6 variables directly in your browser, matching the range typically covered in a Digital Logic Design (DLD) or Computer Engineering course.

How do I simplify a Boolean algebra expression for discrete math or DLD homework?

Type your expression using standard notation (e.g. AB + A'C) and Mantiq instantly minimizes it with the Quine-McCluskey algorithm, showing the simplified SOP/POS form plus a step-by-step algebraic proof naming every law used - the same laws taught in Discrete Mathematics and Digital Logic Design.

Is Mantiq useful for Discrete Mathematics, or only for Digital Logic Design?

Both. Boolean algebra, truth tables, and logic simplification are shared topics between Discrete Mathematics and DLD. Mantiq covers propositional-logic fundamentals (truth tables, simplification, canonical forms) as well as the hardware side (circuit diagrams, gate-level simulation, Verilog).

Can Mantiq generate a truth table from a Boolean expression or minterms?

Yes. Enter an expression or minterms/maxterms directly (e.g. m(1,2,3) or M(0,2,4)), and Mantiq generates the full truth table with minterm/maxterm indices, exportable as CSV.

Does Mantiq require an account or an internet connection?

No. Mantiq runs entirely client-side with no backend, no account, and no telemetry. It's an installable Progressive Web App, so after your first visit it keeps working fully offline.

Can Mantiq export Verilog code from a Boolean expression?

Yes. Once your expression is simplified, Mantiq generates ready-to-use gate-level and dataflow Verilog HDL, with an optional testbench, that you can copy or download.

Mantiq – Boolean Algebra Simplifier & Digital Logic Circuit Simulator

Mantiq is a free, offline-capable digital logic workbench for students, educators, and engineers. Type a Boolean expression and get a minimized SOP/POS solution, a step-by-step algebraic and Quine-McCluskey proof, a Karnaugh map (K-Map) for 2-6 variables, a full truth table, an interactive simulated circuit diagram, and exportable gate-level or dataflow Verilog HDL code.

This app requires JavaScript and WebAssembly to run. Please enable JavaScript in your browser to use Mantiq.

Initializing Logic Engine...

Truth Table

Waveform Diagram

Karnaugh Map

Algebraic Proof

This is an experimental feature to help guide you. Since it's computer-generated, the steps might look a bit different from how a human would solve it!

Gate / Operation	Supported Symbols	Examples
AND	`*`, `&`, `AND`	`AB`, `A(B+C)`, `A * B`
OR	`+`, `\|`, `OR`	`A + B`, `A \| B`
NOT	`'` (suffix), `!`, `~`, `NOT`	`A'`, `!A`, `~(A+B)`
XOR	`^`, `XOR`	`A ^ B`, `A XOR B`
XNOR	`=`, `<->`, `XNOR`	`A = B`, `A <-> B`

Format	Syntax	Examples
Minterms	`m(...)`	`m(1,2,3)`
Maxterms	`M(...)`	`M(0,2,4)`
With Don't Cares	Add `d(...)` or `D(...)`	`m(1,3) d(5,7)`, `M(0) D(2)`
Custom Variables	Prefix with `vars:`	`a,b,c: m(1,2)`, `w,x,y,z: M(0,15)`

Format	Syntax	Examples
By Variable Count	`KMAP(num)`	`KMAP(3)`, `KMAP(4)`
By Custom Variables	`KMAP(v1, v2...)`	`KMAP(x,y,z)`

Feature	Mantiq	Wolfram\|Alpha	Logisim
Boolean Simplification	SOP & POS	SOP & POS	SOP & POS
K-Map	Up to 6 vars	No	Up to 4 vars
Step-by-step Proof	Yes	No	No
Quine-McCluskey	Step-by-step	No	Internal only
Truth Table	Yes	Yes	Yes
Circuit Diagram	Auto-generated	Static diagram	Full editor
Runs Offline	PWA (Browser)	No	Desktop app

Truth Table

Waveform Diagram

Karnaugh Map

Algebraic Proof

Quine-McCluskey

Gate Level Verilog

Dataflow Verilog

Original Circuit

Simplified Circuit

Original PCB Simulation

Simplified PCB Simulation

Commitment to Academic Integrity

Truth Table

Waveform Diagram

Karnaugh Map

Algebraic Proof

Quine-McCluskey

Gate Level Verilog

Dataflow Verilog

Original Circuit

Simplified Circuit

Original PCB Simulation

Simplified PCB Simulation

Learn Formats

1. Boolean Algebra Expressions

2. Canonical Forms

3. Blank K-Map Generation

Example Expressions

Boolean Expressions

Variables & Terms

Min/Max Terms

K-Map Formats

Circuit

About Mantiq

Mantiq

Minimize Expressions

Algebraic Proofs

Karnaugh Maps

Truth Tables

Live Circuit Simulation

Verilog Export

Why Mantiq?

Privacy Policy

1. No Personal Data Collection

2. Local Storage

3. Analytics

4. Third-Party Services

5. Cookies

6. Changes to This Policy

7. Contact

Terms of Use

1. Acceptance

2. Permitted Use

3. Academic Integrity

4. No Warranty

5. Limitation of Liability

6. Intellectual Property

7. Changes

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